This invention relates to a data processing system, and more particularly, to a data processing system which utilizes a technique applied to a microcomputer for development of an outline font for a bit map display using a CRT (cathode ray tube), a plasma display device, a liquid crystal display device, or a page printer such as i) a laser beam printer, ii) a liquid crystal printer, or iii) an LED (light emitting diode) printer.
One of the formats used to draw a pattern in a bit map memory is a dot font format wherein a pattern is represented in a dot matrix. The dot font format is easy to handle and allows a pattern to be drawn at high speed because the font data in the matrix is actually a representation of dots corresponding to the picture elements. However, it is difficult to rotate font data to an arbitrary angle. Also, where the dot density is comparatively low, an enlarged display results in a rough or uneven profile. If the dot density is increased, the amount of data will increase.
The problems which arise when using a dot matrix system, such as a rough profile and an increased amount of data, can be eliminated by employing a vector graphics technique wherein a pattern is drawn in accordance with outline font data. The outline font data has a data structure wherein a profile of a pattern is defined as an aggregate of lines.
For example, outline font data includes information indicative of the type of line needed and information concerning the starting point, the end point, and/or some other control points of such line. The type of line can be a straight line or a free curved line such as a short line vector, an arc, a spline curve or a Bezier curve.
When a conventional single chip microcomputer is employed to provide a system which draws an outline font in accordance with outline font data as described above, a CPU (central processing unit) core receives, from an external memory, data indicating the types of lines comprising the outline font. The CPU core includes a direct memory access controller and some other peripheral circuits. The CPU core then decodes the received outline font data and executes calculations for development into a dot pattern. The CPU core transfers the corresponding outline font to an external working memory which functions as a font cache memory. Then, either the CPU or the direct memory access controller transfers the outline font from the working memory to a page memory such as a frame buffer memory. The DMAC is built in the single chip microcomputer and has a data block transfer function such as a BITBLT (bit block transfer) function. Drawing of the outline font into the page memory is completed in this manner. When, for example, the drawn contents of the page memory are to be printed, a drawing/displaying processor, such as a CRT controller, sends out a document composed of an outline font completed on the page memory as video signals to a laser beam printer engine.
An example of a document relating to an outline font drawing system of the type described above is Nikkei Electronics, No. 417, Nikkei MacGraw Hill, Mar. 23, 1987, pp. 205-227.
Investigations of the prior art described above have revealed many drawbacks. In particular, since the CPU core executes generation of an outline font, it cannot execute any other operation simultaneously. This deteriorates the operation efficiency of the entire system. Development of an outline font requires calculations of coordinate points of free curved lines which involve a large amount of floating point calculations. Also, a coordinate transformation such as an enlargement, a reduction or a rotation involves a large amount of floating point calculations. Floating point calculations greatly burden the CPU core.
It may seem advantageous to add an FPU (floating point arithmetic unit) as a co-processor in order to increase the speed of a calculation for a free curved line and a coordinate transformation. But, even though the speed of calculation of existing FPUs is several microseconds for routine calculations, floating point calculations require much more calculating time. There is a limit to the increase of the speed of calculation because of the architecture of the FPU. Since the FPU is closely coupled to the CPU, the CPU core cannot proceed with independent data processing while the FPU is calculating. The instructions for both the CPU and FPU are common to each other so the CPU core does not execute a new command until the FPU completes execution of a required coprocessor instruction. In other words, CPU and FPU instructions are stored in a common memory space. When the FPU is executing calculations which aid in the generation of an outline font, other work cannot be executed by the system. Therefore, the operation efficiency of the entire system is not significantly improved when an FPU is employed.